JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

Accurate Compact MOSFET Modeling Scheme for Harmonic Distortion Analysis

  • Iniguez, B. (DEEEA Universitat) ;
  • Picos, R. (Department of Physics, Universitat de les Illes Balears) ;
  • Kwon, I. (Department of Electrical Engineering and Computer Science, KAIST) ;
  • Shur, M.S. (ECSE Department Rensselaer Polytechinc Institute) ;
  • Fjeldly, T.A. (UniK-University Graduate Center) ;
  • Lee, K. (Department of Electrical Engineering and Computer Science, KAIST)
  • Published : 2004.09.30
Download PDF
⟨ Previous Next ⟩

Abstract

We discuss and develop a compact MOSFET modeling scheme in order to obtain accurate descriptions of the drain current and its derivatives up to the 5th order. We have analyzed the physical effects which govern the behaviour of the 3rd derivative in long and deep-subrnicron channel MOSFETs. Our modeling agrees well with experimental data and describes continuous transitions between operating regimes, thanks to the use of continuous functions, which do not introduce any artificial peaks.

Keywords

References

  1. K. Lee , 'The Impact of nm CMOS Technology of Wireless Circuit and System,' Proc of the 2003 Asia-pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices
  2. Shin, Hyungcheol ; Minkyu Je ; Jeonghu Han; Kwyro Lee, Microelectronics Reliability, vol. 43 no. pp.601-609, Apr. 2003 https://doi.org/10.1016/S0026-2714(02)00352-9
  3. R. Van Langevelde and F. M. Klaasen, IEEE Trans. on Electron Devices, vol. 44, no, 11 pp. 2044-2052, November 1997 https://doi.org/10.1109/16.641382
  4. R. van Langevelde, et al., Electron Devices Meeting, 2000, IEDM Technical Digest. International , Pages:807 - 810, 10-13 Dec. 2000 https://doi.org/10.1109/IEDM.2000.904440
  5. R. van Langevelde and F. M. Klaassen, Solid-State Electronic, vol. 44, no., pp. 409-418, March 2000 https://doi.org/10.1016/S0038-1101(99)00219-1
  6. Y. P. Tsividis, Operation and Modeling of the MOS Transistor, 2nd ed., New York: McGraw Hill, 1999
  7. T. -L. Chen and G. Gildenblat, Solid-State Electronics, vol. 45, pp. 335-339, 2001 https://doi.org/10.1016/S0038-1101(00)00283-5
  8. K. Joardar, et al., IEEE Trans. on Electron Devices, vol. 45, pp. 134-148, January 1998 https://doi.org/10.1109/16.658823
  9. J. -M. Sallese, et al., Solid-State Electronics, vol. 47, pp 677-683, 2003 https://doi.org/10.1016/S0038-1101(02)00336-2
  10. A I A Cunha, M C Schneider, C Galup-Montoro, 'An MOS Transistor Model for Analog Circuit Design', IEEE Journ Solid-State Clrcuits,Vol 33, No 10, pp 1510-1519, October 1998 https://doi.org/10.1109/4.720397
  11. C -K Park, et al , 'A unified current-voltage model for long-channel nMOSFETs,' IEEE Trans on Electron Devices, vol 38, pp 399-406, February 1991 https://doi.org/10.1109/16.69923
  12. M S Shur, T A Fjeldly, T Ytterdal and K Lee, 'Unified MOSFET model, 'Solid-State Electronics, vol 35, no 12, pp 1795-1802, December 1992 https://doi.org/10.1016/0038-1101(92)90263-C
  13. K Lee, M Shur, T A Fjeldly and T Ytterdal, Semiconductor Device Modeling for VLSI, Prentice-Hall, 1993
  14. T A Fjeldly, T Ytterdal and M Shur, Introduction to Device Modeling and CIrcuit Simulation, New York, John Wiley & Sons, 1998
  15. B Iniguez and E Garcia-Moreno, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. vol 14, no 2, pp 163-166, February 1995 https://doi.org/10.1109/43.370428
  16. B Iniguez and E Garcia-Moreno , Analog Integrated Circuits and Signal Processing (Kluwer), vol 13, no 3, pp 241-259, July 1997 https://doi.org/10.1023/A:1008214114017
  17. S B Chiah, et al ,IEEE Electron Device Letters, vol 25, no 5, May 2004 https://doi.org/10.1109/LED.2004.826513
  18. C C McAndrew, B K Bhattacharyya and O Wing, IEEE Electron Device Letters, vol 12, pp 565-567, October 1991 https://doi.org/10.1109/55.119190
  19. N D Arora, et al , IEEE Trans on Electron Devices, vol 41, pp 988-997, June 1994 https://doi.org/10.1109/16.293312
  20. Y Cheng, et al , IEEE Trans on Electron Devices, vol 44, pp 277-287, February 1997 https://doi.org/10.1109/16.557715
  21. J A Power and W A Lane, IEEE Trans on Computer-Arded Design, vol 11, pp 1418-1425, November 1992 https://doi.org/10.1109/43.177404