KIEE International Transactions on Electrophysics and Applications

The Korean Institute of Electrical Engineers (대한전기학회)
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An LTCC Linear Delay Filter Design with Interdigital Stripline Structure

  • Hwang, Hee-Yong (Dept. of Electric and Electronic Eng., Kangwon National University) ;
  • Kim, Seok-Jin (Dept. of Electric and Electronic Eng., University of Maryland, MD, USA) ;
  • Kim, Hyeong-Seok (School of Electrical and Electronics Engineering, Chungnag University)
  • Published : 2004.12.01
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Abstract

In this paper, new design equations based on the pole-zero analysis for multi-layered interdigital stripline linear group delay bandpass filter with tap input ports are presented. As a design example, a four-pole group delay filter with center frequency of 2.14GHz, bandwidth of 160MHz, and group delay variation of $\pm$0.1nS for LTCC technology or multilayered PCB technology is designed. In the design process, it is not necessary to simulate the entire structure, as the simulation of half structures is sufficient. Good results can be attained after the optimizing process was performed three times using the proposed equations and a commercial EM simulator.

Keywords

References

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