한국초전도ㆍ저온공학회논문지 (Progress in Superconductivity and Cryogenics)

  • 제6권4호
  • /
  • Pages.41-45
  • /
  • 2004
  • /
  • 1229-3008(pISSN)
  • /
  • 2287-6251(eISSN)
한국초전도저온학회 (The Korean Society of Superconductivity and Cryogenics)
권호 표지

Design Improvement and Measurement of a Rapid Single Flux Quantum Confluence Buffer

  • 발행 : 2004.11.01
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

Rapid Single flux quantum (RSFQ) confluence buffer is widely used in complex superconductive digital circuits. In this work, we have improved the currently used confluence buffer and obtained a more soundly designed confluence buffer. In simulations, improvements in the bias margins of 11 % and the global margins of 10%, compared to the previously used confluence buffer, were achieved. Global margins are very important in estimating a process error range allowed in fabrications. We used two circuit simulation tools, WRspice and Julia, to design and optimize the confluence buffer. We used Xic to obtain a mask layout. We fabricated the improved circuits by using Nb technology. The test results at low frequency showed that the improved confluence buffer operated correctly and had a very wide main bias margin of +/-43% enhanced from +/-26% of the previously used confluence buffer.

키워드

참고문헌

  1. J. Y. Kim, S. H. Baek, and J. H. Kang, 'Construction of a single magnetic flux quantum switch and its usage in an arithmetic logic unit,' J. Korean Phys. Soc, vol. 43, pp. 1129-1134, 2003
  2. K. Likharev and V. Semenov, 'RSFQ logic / memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems,' IEEE Trans. Appl. Supercond, vol. 1, pp. 3-28, 1991
  3. Q. P. Herr, N. Vukovic, C. A. Mancini, K. Gaj, Q. Ke, V. Adler, E. G. Friedman, A. Krasniewski, M. F. Bocko, and M. J. Feldman, 'Design and low speed testing of a four-bit RSFQ multiplier-accumulator,' IEEE Trans. Appl. Supercond, vol. 7, pp. 3168-3171,1997
  4. R. D. Sandell, B. J. Dalrymple, and A. D. Smith, 'An SFQ digital to analog converter,' IEEE Trans. Appl. Supercond, vol. 7, pp. 2468-2471,1997
  5. V. K. Semenov, 'Digital to analog conversion based on processing of the SFQ pulses,' IEEE Trans. Appl. Supercond, vol. 3, pp. 2637-2640,1993
  6. K. R. Jung and J. H. Kang, 'Application of fast-moving magnetic-flux-quanta in constructing an AND gate and an OR gate,' J. Korean Phys. Soc, vol. 45, pp. 479-484, 2004
  7. N. B. Dubash, P. F. Yuh and V. V. Borzenets, 'SFQ data communication switch,' IEEE Trans. Appl. Supercond, vol. 7, pp. 2681-2684',1997
  8. C. J. Burroughs, S. P. Benz, T. E. Harvey, and C. A. Hamilton, '1 volt DC programmable Josephson voltage standard,' IEEE Trans. Appl. Supercond, vol. 9, pp. 4145-4149, 1999
  9. C. A. Hamilton and Frances L. Lloyd, '100 GHz binary conter based on DC SQUID,' IEEE Electron Dev. Lett., Vol. EDL-3, pp. 335-338. 1982
  10. W. Chen, A. V. Rylyakov, V. Patel, J. E. Lukens, and K. K. Likharev, 'Rapid single flux quantum T-flip flop operating up to 770 GHz,' IEEE Trans. Appl. Supercond, vol. 9, pp. 3212-3215 , 1999
  11. http://www.wrcad.com/wrspice.html
  12. http://www.wrcad.com/xic.html
  13. HYPRES design rules can be found at Hypres web site at www.hypres.com