초록
Time delays are included in most of actual systems, and some of which are shown as time varying. To analyze the time varying time delay system in the time domain. a useful delay module to express the function as a tool is much helpful to get corresponding outputs under given conditions. A method is proposed here to design the algorithm of time delay module for simulation or control purposes, including the problems of initializing and reallocating data in buffer. After classifying the time varying time delay into the distributed mode and lumped mode, an object to describe delay module is configured and tested under the defined input signal and given time delay variation. The simulation results show that the output of module matches reasonably with the case of real system.