Step-One in Pre-regulator Boost Power-Factor-Correction Converter Design

  • Orabi, Mohamed (Dept. of Electrical and Electronics Systems Eng., Kyushu University) ;
  • Ninomiya, Tamotsu (Dept. of Electrical and Electronics Systems Eng., Kyushu University)
  • Published : 2004.01.01

Abstract

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

Keywords

References

  1. L. H. Dixon, 'High power factor pre-regulator for off-line power supplies,' Unitrode PSDS, SEM. 600, 1988
  2. L. H. Dixon, 'Average current mode control of switching power supplies,' Unitrode Appication handbook, Application Note U140, pp. 3-356-3-369, 1997
  3. L. Rossetto, et. aI, 'Control techniques for power factor correction converters,' PEMC, pp. 1310-1318, Sept. 1994
  4. L. H. Dixon, 'Optimizing the design of a high power switching pre-regulator,' Unitrode Power Supply Design Seminar Manual, SEM. 700, 1990
  5. R. Ridley, 'Average small-signal analysis of boost power factor correction circuit,' VEPC, pp. 108-120, 1989
  6. F. A. Huliehel, et. al, 'Small-signal modeling of the single-phase boost high power factor correction techniques,' VPEC, pp. 93-100, 1992
  7. P. Tenti and G. Spiazzi, 'Harmonic limiting standards and power factor correction techniques,' A tutorial presented at the 6th European Conference on Power Electronics and Applications-EPE, Seville, Span, Sept. 1995
  8. James P. Noon and D. Dalal, 'Practical design issues for PFC circuits,' Applied Power Electronics Conference APEC, Georgia, USA, pp. 51-58, 1997
  9. S. Mazumder, et. Al, 'A Novel approach to the stability analysis of boost power-factor-correction circuits,' Power Electronics Specialist Conference PESC, British Columbia, Canada, pp. 1719-1724, 2001
  10. C.K. Tse, O. Dranga and H.H.C. Iu, 'Bifurcation Analysis of a Power-factor-Correction Boost Converter: Uncovering Fast-Scale Instability,' IEEE International Symposium on Circuits and Systems ISCAS, Bangkok, Thailand, pp. III-312-315, 2003
  11. M. Orabi, T. NiNomiya, C. Jin, 'New practical issue for power factor correction converter stability,' European International Conference on Power Engineering and Energy Systems EuroPES, Crete, Greece, pp. 340-345, 2002
  12. M. Orabi, T. NiNomiya, C. Jin, 'A Novel modeling of instability pheNomena in PFC converter,' The IEEE 24th International Telecommunications Energy Conference INTELEC, Montreal, Canada, pp. 566-573, 2002
  13. M. Orabi, T. NiNomiya, C. Jin, 'New formulation for the stability analysis of power factor correction converters,' The IEEE International Power Electronics Congress CIEP, Mexico, pp. 33-38, 2002
  14. M, Orabi, T. NiNomiya, C. Jin, 'Novel developments in the study of Nonlinear pheNomena in power factor-correction circuits' The 28th Annual Conference of the IEEE Industrial Electronics Society IECON, Seville, Spain, pp. 209-215, 2002
  15. John A. O'conner, The UC3854 Average current mode controller squeezes maximum performance from single switch converters, Unitrode Application Note, U-135, pp. 3-289 - 3-287, 1997