References
- C.C.Enz, F. Krummenacher, E.A. Vittoz, 'An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications', Analog Integrated Circuits and Signal Processing, vol. 8-1, pp.83-114, 1995 https://doi.org/10.1007/BF01239381
- C.C. Enz, 'The EKV Model: a MOST Model Dedicated to Low-Current and Low-Voltage Analogue Circuit Design and Simulation', Low-Power HF Micro-electronics: a Unified Approach, G.A.S. Machado Ed., IEE Circuits and Systems and Series 8, The Institution of Electrical Engineers pp. 247-300, 1996
-
B. Iniguez, L.F. Ferreira, B. Gentinne, D. Flandre, 'A physically-based
$C_{\infty}$ -continuous fully-depleted SOl MOSFET model for analog applications', IEEE Transactions on ElectronDevices, vol.43, pp.568-575, 1996 https://doi.org/10.1109/16.485539 -
B. Iniguez, V. Dessard, D. Flandre, B. Gentinne, 'A physically-based
$C_{\infty}$ -continuous model for accumulationmode SOl pMOSFETs', IEEE Transactions on Electron Devices, vol.46, 1999. pp.2295-2303 https://doi.org/10.1109/16.808063 - J.P. Colinge, 'An SOI Voltage-Controlled Bipolar-MOS Devices,' IEEE Trans. Electron Devices, vol. 34, pp.845-849, 1987 https://doi.org/10.1109/T-ED.1987.23005
- T. Douseki, S. Shigematsu, J. Yamada, M. Harada, H. Inokawa, and T. Tsuchiya, 'A 0.5- V MTCMOS/SIMOX Logic Gate', IEEE Journal of Solid-State Circuits, vol. 32, pp.1604-1609,1997 https://doi.org/10.1109/4.634672
- S. A. Parke, C. Hu, and P. K. Ko, 'Bipolar-FET Hybrid-Mode Operation Quarter-Micrometer SOl MOSFET's,' IEEE Electron Device Lett., vol. 14,pp.234-236, 1993 https://doi.org/10.1109/55.215178
- Z. Van, M. J. Deen, and D. S. Malhi, ' Gate-Controlled Lateral PNP BJT: Characteristics, Modeling and Circuit Applications,' IEEE Trans. Electron Devices, vol. 44, pp.118-128, 1997 https://doi.org/10.1109/16.555443
- F. Assaderaghi, D. Sinitsky, S. A. Parke, J. Bokor, P. K. Ko, and C. Hu, 'A Dynamic Threshold Voltage MOSFET (DTMOS) for Ultra-Low Voltage Operation,' Tech. Digest of IEDM, pp.809-813, 1994 https://doi.org/10.1109/IEDM.1994.383301
- T. Douseki, F. Morisawa, S. Nakata, Y. Ohtomo, 'A 0.5-V, Over 1-Ghz, 1-mW MUX/DEMUX Core with Multi-Threshold ZZero-Vth CMOS/SIMOX Technology', Extended Abstracts of the International Conference on Solid-State Devices and Materials (SSDM), pp. 264-265, 2001
- J. B. Kuo, K. H. Yuan, and S. C. Lin, 'Compact Threshold-Voltage Model for Short-Channel Partially-Depleted(PD) SOl Dynamic-Threshold MOS(DTMOS) Devices, IEEE Transactions on Electron Devices, vol. 49, pp.190-196, 2002 https://doi.org/10.1109/16.974770
- R. Hung, Y. Y. Wang, and R. Han, 'Analytical Model for the Collector Current in SOl Gated-Controlled Hybrid Transistor,' Solid-State Electronics, vol. 39, pp.1816-1818,1996 https://doi.org/10.1016/S0038-1101(96)00118-9