JSTS:Journal of Semiconductor Technology and Science

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Electrostatic Discharge (ESD) and Failure Analysis: Models, Methodologies and Mechanisms for CMOS, Silicon On Insulator and Silicon Germanium Technologies

  • Voldman, Steven H. (IBM Semiconductor Research and Research and Development Center(SRDC) Essex Junction)
  • Published : 2003.09.01
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Abstract

Failure analysis is fundamental to the design and development methodology of electrostatic discharge (ESD) devices and ESD robust circuits. The role of failure analysis (FA) in the models, methodology, band mechanisms evaluation for improving ESD robustness of semiconductor products in CMOS, silicon-on-insulator (SOI) and silicon germanium (SiGe) technologies will be reviewed.

Keywords

References

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