Improved Breakdown Voltage Characteristics of $In_{0.5}Ga_{0.5}P/In_{0.22}Ga_{0.78}As/GaAs$ p-HEMT with an Oxidized GaAs Gate

  • I-H. Kang (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST)) ;
  • Lee, J-W. (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST)) ;
  • S-J. Kang (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST)) ;
  • S-J. Jo (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST)) ;
  • S-K. In (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST)) ;
  • H-J. Song (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST)) ;
  • Kim, J-H. (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST)) ;
  • J-I. Song (Department of Information and Communications, Kwangju Institute of Science and Technology (K-JIST))
  • 발행 : 2003.06.01

초록

The DC and RF characteristics of $In_{0.5}Ga_{0.5}P/In_{0.22}Ga_{0.78}As/GaAs$ p-HEMTs with a gate oxide layer of various thicknesses ($50{\;}{\AA},{\;}300{\;}{\AA}$) were investigated and compared with those of a Schottky-gate p-HEMT without the gate oxide layer. A prominent improvement in the breakdown voltage characteristics were observed for a p-HEMT having a gate oxide layer, which was implemented by using a liquid phase oxidation technique. The on-state breakdown voltage of the p-HEMT having the oxide layer of $50{\;}{\AA}$was ~2.3 times greater than that of a Schottky-gate p-HEMT. However, the p-HEMT having the gate oxide layer of $300{\;}{\AA}$ suffered from a poor gate-control capability due to the drain induced barrier lowering (DIBL) resulting from the thick gate oxide inspite of the lower gate leakage current and the higher on-state breakdown voltage. The results for a primitive p-HEMT having the gate oxide layer without any optimization of the structure and the process indicate the potential of p-HEMT having the gate oxide layer for high-power applications.

키워드

참고문헌

  1. G. Meneghesso, A. Neviani, R. Oesterholt, M. Matloubian, T. Liu, J.J. Brown, C. Canali, and E. Zanoni, 'On-state and off-state breakdown in GaInAs/InP composite-channel HEMT's with variable GaInAs channel thickness,' IEEE Trans. Electron Devices, Vol. 46, pp.2-9, Jan. 1999 https://doi.org/10.1109/16.737434
  2. S. R. Bahl, J. A. del Alamo, J. Dickmann, S. Schildberg, 'Off-state breakdown in InAlAs/InGaAs MODFET's,' IEEE Trans. Electron. Dev., vol. 42, pp. 15-22, Jan. 1995 https://doi.org/10.1109/16.370041
  3. M. H. Somerville, J. A. del Alamo, 'A model for tunneling-limited breakdown in high-power HEMTs,' IEEE Elec. Dev. Meeting, pp. 35-38, 1996 https://doi.org/10.1109/IEDM.1996.553116
  4. T. Enoki, K. Arai, A. Kohzen, Y. Ishii, 'InGaAs/InP double channel HEMT on InP,' 4th International conference on IPRM, pp. 14-24, 1992 https://doi.org/10.1109/ICIPRM.1992.235699
  5. G. Meneghesso, A. Mion, A. A. Neviani, M. Matloubian, J. Brown, M. Hafizi, L. Takyiu, C. Canali, M. Pavesi, M. Manfredi, E. Zanoni, 'Effects of channel quantization and temperature on off-state and on-state breakdown in composite channel and conventional InP-based HEMTs,' Electron Devices Meeting, pp. 43-46, 1996 https://doi.org/10.1109/IEDM.1996.553118
  6. J. C. Huang, G. S. Jackson, S. Shanfield, A. Platzker, P. K. Saledas, C. Weichert, 'An AlGaAs/InGaAs pseudomorphic high electron mobility transistor with improved breakdown voltage for X- and Ku-band power applications,' IEEE Trans. Microwave Theory and Techniques, vol. 41, pp. 752 -759, May 1993 https://doi.org/10.1109/22.234507
  7. K. W. Eisenbeiser, J. R. East, G. I. Haddad, 'Theoretical analysis of the breakdown voltage in pseudomorphic HFET's,' IEEE Trans. Elec. Dev., vol. 43, pp. 1778-1787, Nov. 1996 https://doi.org/10.1109/16.542421
  8. K. Inoue, Y. Ikeda, H. Masato, T. Matsuno, K. Nishii, 'Novel GaN-based MOS HFETs with thermally oxidized gate insulator,' IEDM 2001 Technical Digest, pp. 25.2.1 -25.2.4, 2001 https://doi.org/10.1109/IEDM.2001.979572
  9. Jau-Yi Wu, Hwei-Heng Wang, Yeong-Her Wang, Mau-Phon Houng, 'GaAs MOSFET's Fabrication with a selective liquid phase oxidation gate,' IEEE Trans. Elec. Dev., vol. 48, pp. 634-637, Apr. 2001 https://doi.org/10.1109/16.915668
  10. M. Hong, J. N. Baillargeon, J. Kwo, J. P. Mannaerts, A. Y. Cho, 'First demonstration of GaAs CMOS,' ISCS 2000 Technical Digest, pp. 345-350, 2000 https://doi.org/10.1109/ISCS.2000.947180
  11. M. H. Somerville, R. Blanchard, J. A. del Alamo, G. Duh, P. C. Chao, 'A new gate current extraction technique for measurement of on-state breakdown voltage in HEMTs,' IEEE Elec. Dev. Lett., vol. 19, pp. 405 -407, Nov 1998 https://doi.org/10.1109/55.728894
  12. R. Anholt, 'Drain barrier lowering in HEMTs,' GaAs IC Symposium 1998 Technical Digest, pp. 99-102, 1998 https://doi.org/10.1109/GAAS.1998.722638