The Journal of Korean Institute of Communications and Information Sciences (한국통신학회논문지)

The Korean Institute of Commucations and Information Sciences (한국통신학회)
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An efficient Frequency and Symbol Synchronization Scheme for DVB-T System

DVB-T 시스템을 위한 효율적인 주파수 및 심볼동기 구조

  • 이형욱 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 김기윤 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 최형진 (성균관대학교 전기전자 및 컴퓨터공학부)
  • Published : 2002.01.01
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Abstract

This paper proposes an efficient frequency and symbol synchronization structure which could solve problems of the conventional methods to implement DVB-T receive modem which adopted OFDM transmission method. The main considerations of frequency synchronization algorithms are that the frequency tracking performance is not stable enough, and lots of symbols are required, especially when the decimal part of normalized frequency offset (which original frequency offset is divided by the subcarrier spacing) is around $\pm$0.5 to solve these problems, we propose an efficient frequency offset is divided by the subcarrier spacing) is around $\pm$0.5 by using the average of coarse synchronization over several symbol. Also, we suggest a new symbol synchronization structure which is easy to implement without performance degradation in multipath fading channel with only coarse symbol synchronization by making window offset to the range of guard interval in contrast to the conventional structure of dividing symbol synchronization in fine and coarse mode during synchronization. By extensive simulation, we have shown the superiority of the proposed schemes.

본 논문에서는 OFDM(Orthogonal Frequency Division Multiplexing) 전송방식을 채택한 DVB-D(Digital Video Broadcasting-Terrestrial) 시스템의 효율적인 주파수 및 심볼 동기 구조를 제안하였다. 주파수 동기시 고려해야 할 사항은 정규화된 주파수 오프셋(실제 주파수 오프셋/부반송파 간격)의 소수부가 $\pm$0.5 부근에 위치할 때, 알고리즘의 추정 성능이 안정적이지 못하여 동기화에 필요한 심볼이 많이 요구된다는 점이다. 본 논문에서 제안하는 주파수 동기 구조는 대략적인 주파수 동기를 여러 심볼 동안 추정한 평균값을 이용하여 정규화된 주파수 오프셋의 소수부가 $\pm$0.5 부근에 위치할 때의 모호성을 해결하고, 대략과 미세 주파수 동기를 동시에 추정하여 보상하는 효율적인 구조이다. 또한 기존의 OFDM 심볼 동기 수행시 대략과 미세로 나누는 동기 구조를 변경하여 윈도우 오프셋이 항상 보호구간 내의 일정 범위 안으로 잔류하도록 만들어 대략적인 심볼 동기 만으로도 다중경로 페이딩 채널에서 시스템의 성능 열화 없이 하드웨어 구현이 용이한 심볼 동기 구조를 제안하였다. 그리고, 광범위한 시뮬레이션에 의해 본 제안 방식의 우수성을 증명하였다.

Keywords

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