Proposal Of Optimum Equalizer Hardware Architecture for Cable Modem and Analysis of Various LMS Algorithms

케이블모뎀용 등화기에 적용되는 다양한 LMS알고리즘에 관한 성능평가 및 최적의 등화기 하드웨어구조 제안

  • 조연곤 (성균관대학교 전기전자 및 컴퓨터 공학부) ;
  • 유형석 (성균관대학교 전기전자 및 컴퓨터 공학부) ;
  • 김병욱 (성균관대학교 전기전자 및 컴퓨터 공학부) ;
  • 조준동 (성균관대학교 전기전자 및 컴퓨터 공학부) ;
  • 김재우 (삼성전자 SOC기술연구소) ;
  • 이재곤 (삼성전자 SOC기술연구소) ;
  • 박현철 (ICU)
  • Published : 2002.01.01

Abstract

This paper presents the convergence time, SER(Symbol Error Rate), MSE(Mean Square Error), hardware complexity and step-size(${\mu}$) about various LMS(Least Mean Square) algorithms in FS-DFE(Fractionally Spaced-Decision Feedback Equalize) for Cable Modem based on MCNS(Multimedia Cable Network System) DOCSIS(Data Over Cable Service Interface Specification) v1.0/v1.1 standards. We designed and simulated using ${SPW}^{TM}$ and synthesized using STD90 library through ${SYNOPSYS}^{TM}$. And also, we adopted the time-multiplexed multiplication and tap shared architecture in order to achieve the low hardware complexity. Simulation results show that DS-LMS algorithms[1][3] is the optimum solution about performace and hardware size. in high order QAM applications. Finally, we achieved area saving about 58% using DS-LMS algorithm compare with conventional equalizer architecture.

본 논문지 MCNS(Multimedia Cable Network System) DOCSIS(Data Over Cable Service Interface Specification) v1.0/v1.1 표준안에 대응하는 케이블모뎀 수신단의 FS-DFE(Fractionally Spaced-Decision Feedback Equalize)에 적용될 다양한 LMS(Least Mean Square)알고리즘에 관하여 수렴특성, SER(Symbol Error Rate) 및 MSE(Mean Square Error) 성능, 하드웨어 복잡도 그리고 step-size(${\mu}$)와의 관계를 $SPW^{TM}$로 모델링하고, 그들 개개의 성능을 보여다. 그리고 Verilog-HDL을 이용하여 RTL 구조를 구성하였고, $SYNOPSYS^{TM}$을 통해 삼성 STD90 라이브러리로 합성하였다. 또한 본 논문에서는 최적의 하드웨어 구조를 가지기 위한 time-multiplexed multiplication 과 tap shared architecture구조를 채택하였다. 실험 결과를 통하여 LMS, DS(Data Signed)-LMS, ES(Error Signed)-LMS, SS(Signed Signed)-LMS[1][3]과 같은 다양한 LMS 알고리즘들 중 DS-LMS 알고리즘이 성능과 하드웨어를 고려한 최적의 알고리즘임을 보였고, DS-LMS 알고리즘 및 여러 가지 저면적 점유 기법을 이용하여 최대 58%까지 하드웨어 면적을 줄일 수 있었다.

Keywords

References

  1. Mark C. Sullivan, 'A Signed Maximum Correlation Multiplier for LMS Pilter Adaptation,' IEEE Trans on signal processing. vol. 41. No. 1. January 1993
  2. N. Wiener, 'Extiapolation, Interpolation and Smothing of Stationary Time Series, with Engineering Applicadons,' New York : Technology Press and Wiley, 1949
  3. 윤대회, '적응 디지탈 필터와 그 응용' 대한 전자공학회 논문지 제 12권 제 5호, 1985
  4. Lionel J. D'Luna, Loke K. Tan, Dean Mueller, Joe L. Laskowski, Kelly Cameron, Jind-Yeh Lee, David Gee, Jason S. Monroe, Honman S. Law, Jason Chang, Myles H. Wakayama, Tom Kwan, Chi-Hung Lin, Aaron Buchwald, Tarek Kaylani, Fang Lu, Tom Spieker, Robert Hawley, Henry Samueli, 'A Single-Chip Universal Cable Set-Top Box/Modem Trans-ceiver,' 1EEE Journat of Sotid-State Circuits, vol. 34, No. 11, November 1999
  5. T. J. Endres, B.D.O.Anderson, C. R. Johnson, Jr., and M. Green, 'Robustness to Practionally-Spaced Equalizer Length Using the Constant Modulus Criterion,' IEEE Transactions on signal processing, vol. 47, No. 2, February 1999
  6. Jie Zhu, Xi-Ren Cao, Ruey-wen Liu, 'A Blind Fractionally Sapced Equalizer Using Higher Order Statistics,' lEEE transactions on circuits and systems- H: Analog and DigitalSignal Processing, vol. 46, No. 6, June 1999
  7. D. N. Godard, 'Self-recovering equalization and carrier tracking in two-dimensional data communication systems,' IEEE Trans .Commun., vol. COMM-28, pp. 1867-1875, Nov. 1980
  8. J. R. Treichler and B. G. Agee, 'A new approach to multipath correction of constant modulus signals,' IEEE Trans. Acoust., Speech, Signat Processing, vol. ASSP-31, pp.459-472, Apr. 1983
  9. C. R. Johnson, Jr. et al., 'Blind equalization using the constant modulus criterion: A review,' Proc. IEEE (Speciat Issue on BlindSystem Identification and Estimation), vol. 86, pp. 1927-1950, Oct. 1998
  10. Jinbiao Xu, Yumin Wang, 'New DeCiSiOn-Directed Equalization Algorithm for QAM Communication Systems,' IEEE, 1996
  11. N. K. Jablon, 'Joint blind equalization, cairier recovery, and timing recovery for high-order QAM signal constellations,' IEEE Trans. Sienat Processing, vol. SP-40, PP. 1383-1398 June 1992
  12. Hyeongseok Yu, Byung Wook Kim, Yeon Gon Cho, Jun Dong Cho, Jea Woo Kim, Jae Kon Lee, Hyeon Cheol Park, Ki Won Lee, 'Area-Efficient and Reusalble VLSI Architec-ture of Decision Feedback Equalizer for QAM Modem, proc, ASP-DAC2001, pp. 404-407 January, 2001
  13. Yeon Gon Cho, Byung Wook Kim, Hyeong-seok Yu, Jun Dong Cho, Jea Woo Kim, Jae Kon Lee, Hyun Chul Park, Ki Won Lee, ' On the various LMS Algorithms for FS-DFE with Low Hardware Complexity suitable for the High Order QAM Applica-don,' proc, SCS2001, PP. 277-280, July, 2001
  14. O. Macchi and E.Eweda,'Convergence analysis of Self-Adaptive Equalizer,' IEEE Trans. IT, vol. IT-30, No.2, March 1984, pp.161-176