JSTS:Journal of Semiconductor Technology and Science

  • 제2권1호
  • /
  • Pages.19-29
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  • 2002
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  • 1598-1657(pISSN)
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  • 2233-4866(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

A Simple and Analytical Design Approach for Input Power Matched On-chip CMOS LNA

  • Kim, Tae-Wook (Dept. of EECS and MICROS Research Center KAIST) ;
  • Lee, Kwyro (Dept. of EECS and MICROS Research Center KAIST)
  • 발행 : 2002.03.01
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초록

A simple and analytical design approach for input power matched CMOS RF LNA circuits and their scaling for lower power consumption, is introduced. In spite of the simplicity of our expressions, it gives excellent agreement with numerical simulation results using commercial CAD tools for several circuit examples performed at 2.4GHz using $0.18\mu\textrm{m}$ CMOS technology. These simple and analytical results are extremely useful in that they can provide enough insights not only for designing any CMOS LNA circuits, but also for characterizing and diagnosing them whether being prototyped or manufactured.

키워드

참고문헌

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