Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Efficient Signal Integrity Verification in Complicated Multi-Layer VLSI Interconnects

복잡한 다층 VLSI 배선구조에서의 효율적인 신호 무결성 검증 방법

  • Jin, U-Jin (Dept. of Electronic computer Engineering, Hanyang University) ;
  • Eo, Yun-Seon (Dept. of Electronic computer Engineering, Hanyang University) ;
  • Sim, Jong-In (Dept. of Electronic computer Engineering, Hanyang University)
  • 진우진 (한양대학교 전자컴퓨터공학부) ;
  • 어윤선 (한양대학교 전자컴퓨터공학부) ;
  • 심종인 (한양대학교 전자컴퓨터공학부)
  • Published : 2002.03.01
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Abstract

Fast and accurate new capacitance determination methodology for non-uniform complicated multi-layer VLSI interconnects is presented. Since a capacitance determination of intricate multi-layer interconnects using 3-dimensional field-solver is not practical, quasi-3-dimensional methodology is presented. Interconnects with discontinuity (i.e., bend structure and different spacing between lines, etc.) are partitioned. Then, each partial capacitance of divided parts is extracted by using 2-dimensional extraction methodology. For a multi-layer interconnects with shielding layer, the system can be simplified by investigating a distribution of charge in it. Thereby, quasi-3-dimensional capacitance for multi-layer interconnects can be determined by combining solid-ground based 2-dimensional capacitance and shielding effect which is independently determined with layout dimensions. This methodology for complicated multi-layer interconnects is more accurate and cost-efficient than conventional 3-dimensional methodology It is shown that the quasi-3-dimensional capacitance methodology has excellent agreement with 3-dimensional field- solver-based results within 5% error.

불규칙하고 복잡한 다층(multi-layer) VLSI 배선의 커패시턴스 추출을 위한 빠르고 정확한 새로운 방법을 개발하였다. 복잡한 다층 배선구조에서 3차원 field-solver를 사용하여 커패시턴스를 구하는 것은 현실적이지 않기 때문에 근사적 3차원 커패시턴스 추출 방법을 제안한다. 꺽이는 부분(bend)과 상이한 배선사이의 거리를 갖는 동일한 층내의 배선은 불연속한 부분과 만나는 곳을 분할하고 각각의 부분에 2차원 커패시턴스 추출 방법을 사용하여 커패시턴스를 추출하였다. 또한 차폐층(shielding layer)을 갖는 다층 배선 구조에서의 커패시턴스는 시스템 내의 전하의 분포를 조사함으로써 시스템을 간소화 시킨 후 평판 그라운드 기반 2차원 커패시턴스와 간단한 구조로부터 독립적으로 계산될 수 있는 차폐효과를 결합하여 근사적3차원 커패시턴스 추출 방법을 적용하였다. 불규칙한 다층 배선 구조에 대하여 설계된 레이아웃으로부터 해석적으로 구할 수 있는 변수와 평판 그라운드를 사용한 2차원 커패시턴스 추출 방법을 사용하므로 정확하면서도 신속하게 커패시턴스를 추출할 수 있어 일반적인 3차원 방법보다 비용 측면에서 훨씬 효과적이다. 제안된 근사적 3차원 방법을 통해 구한 커패시턴스는 3차원 field-solver를 기반으로 구한 커패시턴스와 오차율 5% 이내의 정확성을 나타낸다.

Keywords

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