대한전기학회논문지:시스템및제어부문D (The Transactions of the Korean Institute of Electrical Engineers D)

대한전기학회 (The Korean Institute of Electrical Engineers)
권호 표지

부유게이트 트랜지스터를 이용한 아날로그 연상메모리 설계

Design of an Analog Content Addressable Memory Implemented with Floating Gate Treansistors

  • 발행 : 2001.02.01
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초록

This paper proposes a new content-addressable memory implemented with an analog array which has linear writing and erasing characteristics. The size of the array in this memory is $2{\times}2$, which is a reasonable structure for checking the disturbance of the unselected cells during programming. An intermediate voltage, Vmid, is used for preventing the interference during programming. The operation for reading in the memory is executed with an absolute differencing circuit and a winner-take-all (WTA) circuit suitable for a nearest-match function of a content-addressable memory. We simulate the function of the mechanism by means of Hspice with 1.2${\mu}m$ double poly CMOS parameters of MOSIS fabrication process.

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참고문헌

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