Journal of KIISE:Computer Systems and Theory (한국정보과학회논문지:시스템및이론)

Korean Institute of Information Scientists and Engineers (한국정보과학회)
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Reduction of Read Access Latency by Invalid Hint in Directory-Based Cache Coherence Scheme

디렉토리를 이용한 캐쉬 일관성 유지 기법에서 무효화 힌트를 이용한 읽기 접근 시간 감소

  • 오승택 (한국과학기술원 전기전산학과) ;
  • 이윤석 (한국외국어대학교 전자제어공학부) ;
  • 맹승렬 (한국과학기술원 전기전산학과) ;
  • 이준원 (한국과학기술원 전기전산학과)
  • Published : 2000.04.15
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Abstract

Large scale shared memory multiprocessors have suffered from large access latency to shared memory. The large latency partially stems from a feature of directory-based cache coherence schemes which require a shared memory access to be serviced at a home node of the memory block. The home visit results in three or more hops traversal for a memory read access. The traversal becomes much longer as a system scales up. In this paper, we propose a new cache coherence scheme that reduces read access latency. The proposed scheme exploits ideas of invalid hint. Invalid hint for a cache block means which node has invalidated the cache block before. Thus a read access request can be directly sent to and serviced by the node (called owner) without help of a home node. Execution-driven simulation is employed to evaluate performance of the proposed scheme. The simulation results show that read access latency and execution time are reduced.

대규모 분산 공유메모리 다중처리기는 공유메모리 접근 지연시간이 크다는 약점을 지니고 있다. 이러한 다중처리기에서 모든 메모리 요청이 홈노드를 통해 이루어지는 디렉토리 기반의 캐쉬 일관성 유지 기법의 사용은 메모리 접근 지연시간을 더욱 크게 하는 요인으로 작용한다. 뿐만 아니라 메모리 접근 지연시간은 시스템의 규모가 커질수록 전체 성능에 중요한 요소로 작용하므로, 대규모 시스템에서 이를 줄이기 위해서 많은 연구들이 있었다. 본 논문에서는 메모리 읽기 지연시간을 줄이는 새로운 캐쉬 일관성 유지 기법을 제안한다. 제안된 기법은 무효화힌트를 이용하여 구현되었다. 무효화힌트는 어떤 노드가 전에 캐쉬블록을 무효화 시켰는가에 관한 정보이며, 메모리블록이 필요한 노드는 이 정보를 이용하여 홈노드의 도움 없이 직접 메모리 요청을 할 수 있다. 제안된 프로토콜의 성능을 측정하기 위하여 모의실험을 하였다. 모의실험 결과는 제안된 프로토콜에서 읽기 지연시간이 감소하는 것을 나타낸다.

Keywords

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