Wall Charge Measurement in the Address Period of AC Plasma Display Panel

  • Kim, Dong-Hyun (Department of Electrical Engineering, Pusan National University) ;
  • Lee, Sung-Hyun (Department of Electrical Engineering, Pusan National University) ;
  • Kim, Young-Dae (Department of Electrical Engineering, Pusan National University) ;
  • Park, Jung-Tae (Department of Electrical Engineering, Pusan National University) ;
  • Lee, Gi-Bum (Department of Electrical Engineering, Pusan National University) ;
  • Lee, Jae-Young (Department of Electrical Engineering, Pusan National University) ;
  • Ryu, Jae-Hwa (LG. Electronics Co.ltd.) ;
  • Park, Chung-Hoo (Department of Electrical Engineering, Pusan National University)
  • Published : 2000.12.21

Abstract

The relationship between driving voltage and the amount of wall charge in the address period of surface discharge type AC Plasma Display Panel has been investigated. The amount of wall charge on each electrode is obtained simultaneously from the current profiles after applying only one addressing discharge pulse. The wall charge $Q_y$ on the scan electrode Y is almost the sum of $Q_x$ on the address electrode X and $Q_z$ on the sustain electrode Z. The $Q_y$ increased with the driving voltage regardless of the kind of electrode, whereas the addressing $T_d$ decreased. The $Q_x$ and $Q_y$ are increased considerably by blocking voltage $V_z$, whereas $Q_x$ is decreased. The $V_z$ dependence of $Q_x$ $Q_y$ and ${\varrho}_z$ in addressing discharge was $-13{\times}10^{-2}$ (pc/$V_z$), and $60{\times}10^{-2}$ ($pc/V_z$) and $70{\times}10^{-2}(pc/V_z)$, respectively.

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