대한전기학회논문지:전기물성ㆍ응용부문C (The Transactions of the Korean Institute of Electrical Engineers C)

대한전기학회 (The Korean Institute of Electrical Engineers)
권호 표지

정전접합을 이용한 고종횡비의 FED용 스페이서 공정 개발

Development of High Aspect Ratio Spacer Process using Anodic Bonding for FED

  • 발행 : 2000.01.01
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초록

In this paper, a spacer process for FED(Field Emission Display) was developed with the glass to glass anodic bonding technology using Al film as an interlayer and a 3.5 inch monochromatic type FED was fabricated. Holder to dislocate spacers vertically was designed with (110) Si wafer by bulk etching. Spacers, $100\mum\; width\; and\; 1000\mum$ height, were formed on anode panel by spacer to glass anodic bonding and the fabricated FED was operated for emission at 1㎸ anode voltage.

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참고문헌

  1. D. A. Cathey, C. C. Yu, T. T. Doan, T. A. Lowrey and J. B. Rolfson, 'Spacers for field emission display fabricated via self-aligned high energy ablation,' U.S. Patent 5,232,549, 1993
  2. R. H. Tayler and J. D. Levine, 'Spacers for flat panel display,' U.S. Patent, 5,52,517, 1996
  3. D. A. Cathey and J. J. Browing, 'Method for forming spacers for display devices employing reduced pressure,' U.S. Patent 5,503,582, 1996
  4. J. B. Elledge, 'Method for forming spacers in flat panel displays using photoetching,' U.S. Patent 5,705,079, 1998