Journal of Korean Society of Industrial and Systems Engineering (산업경영시스템학회지)
- Volume 22 Issue 53
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- Pages.111-120
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- 1999
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- 2005-0461(pISSN)
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- 2287-7975(eISSN)
Fault-Tolerant Analysis of Redundancy Techniques in VLSI Design Environment
Abstract
The advent of very large scale integration(VLSI) has had a tremendous impact on the design of fault-tolerant circuits and systems. The increasing density, decreasing power consumption, and decreasing costs of integrated circuits, due in part to VLSI, have made it possible and practical to implement the redundancy approaches used in fault-tolerant computing. The purpose of this paper is to study the many aspects of designing fault-tolerant systems in a VLSI environment. First, we expound upon the opportunities and problems presented by VLSI technology. Second, we consider in detail the importance of design mistakes, common-mode failures, and transient faults in VLSI. Finally, we examine the techniques available to implement redundancy using VLSI and the promlems associated with these techniques.
Keywords