Journal of the Korean Institute of Telematics and Electronics S (전자공학회논문지S)
- Volume 35S Issue 1
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- Pages.105-113
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- 1998
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- 1226-5837(pISSN)
A VLSI implementation of image processor for facsimile and digital copier
팩시밀리 및 디지털 복사기를 위한 고속 영상 처리기의 VLSI구현
Abstract
A new image processor is implemented for high-speed digital copiers and facsimiles. The imgage processor performs CCD and CIS interface, pre-processing, enlargement andreduction of gray level image, and various halftoning algorithms. Implemented halftoning algorithms are simple thresholding, fuzzy based mixed mode thresholding, dithering, and edge enhanced error diffusion. The result of binarization is transferred to a printer with serial or paralel output ports. Line by line pipelined data prodessing architecture is employed with time sharing access of the external memory. In receiving mode, it converts the resolution of received binary image for compatibility with conventional facsimile. In copy mode, a line of A3 paper with 400 dpi is processed with in 2.5 ms. The prototype of image processor was implemented usig Laser Programmable Gate Array (LPGA) with 0.8.mu.m technology.
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