한국통신학회논문지 (The Journal of Korean Institute of Communications and Information Sciences)

  • 제22권7호
  • /
  • Pages.1394-1402
  • /
  • 1997
  • /
  • 1226-4717(pISSN)
  • /
  • 2287-3880(eISSN)
한국통신학회 (The Korean Institute of Commucations and Information Sciences)
권호 표지

내장된 메모리를 위한 향상된 March 테스트 알고리듬의 설계 및 구현

Design and implementation of improved march test algorithm for embedded meories

  • 박강민 (숭실대학교 대학원 전자계산학과) ;
  • 장훈 (숭실대학교 컴퓨터학부) ;
  • 양승민 (숭실대학교 컴퓨터학부)
  • 발행 : 1997.07.01
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초록

In this work, an efficient test algorithm and BIST architeture a for embedded memories are presented. The proposed test algorithm can fully detect stuck-at fault, transition fault, coupling fault. Moreover, the proposed test algorithm can detect nighborhood pattern sensitive fault which could not be detected in previous march test algoarithms. The proposed test algorithm perposed test algorithm performs testing for neghborhood pattern sensitive fault using backgroung data which has been used word-oriented memory testing.

키워드

참고문헌

  1. Testing Semiconductor Memories A. J. Goor
  2. Digital systems testing and testable design M. Abramovici;M. A. Breuer;A. D. Friedman
  3. 전자공학회지 v.22 no.12 메모리 테스트를 위한 BIST 기술 김대우;배성기;이창기;이상진;전병실
  4. International Test Conference Fault Modeling and Test Algorithm Development for Static Random Access Memories R. Dekker;F. Beenker;L. Thijseen
  5. International Test Conference Testing for Coupled Cells in Random-Access Memories J. Savir;W. H. McAnney;S. R. Vecchio
  6. International Test Conference A Realistic Self-Test Machine for Static Random Access Memories R. Dekker;F. Beenker;L. Thijseen
  7. 전자공학회지 v.22 no.12 차세대 반도체 메모리의 테스트 기술 이화준;소병세
  8. International Test Conference Test Pattern Development and Evaluation for DRAMs with Fault Simulator RAMSIM H. D. Oberle;P. Muhmenthaler
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  11. Design Analyzer Reference, Version 3.4a Synopsys Inc.
  12. Logic Synthesis Using Synopsys P. Kurup;T. Abbasi