전자공학회논문지C (Journal of the Korean Institute of Telematics and Electronics C)
- 제34C권10호
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- Pages.36-42
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- 1997
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- 1226-5853(pISSN)
Systolic array 구조를 갖는 움직임 추정기 설계
Design of a motion estimator with systolic array structure
초록
In the whole world, the research about the VLSI implementation of motion estimation algorithm is progressed to actively full (brute force) search algorithm research with the development of systolic array possible to parallel and pipeline processing. But, because of processing time's limit in a field to handle a huge data quantily such as a high definition television, many problems are happened to full search algorithm. In the paper, as a fast processing to using parallel scheme for the serial input image data, motion estimator of systolic array structure verifying that processing time is improved in contrast to the conventional full search algorithm.
키워드