센서학회지 (Journal of Sensor Science and Technology)
- 제4권4호
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- Pages.55-61
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- 1995
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- 1225-5475(pISSN)
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- 2093-7563(eISSN)
Design of a New ISFET Array Chip
- Yeow, Terence (Microelectronics Centre, University of South Australia) ;
- Seo, Hwa-Il (Dept. of Electronic Engineering, Korea Institute of Technology and Education) ;
- Mulcahy, Dennis (School of Chemical Technology, University of South Australia) ;
- Haskard, Malcolm (Microelectronics Centre, University of South Australia)
- 발행 : 1995.11.30
초록
가변 입력전압을 이용하여 ISFET의 문턱전압을 검출하는 새로운 개념의 ISFET array chip을 설계하였다. 설계된 칩은 240개의 pH-ISFET와 신호처리회로를 포함하며, 증가된 신뢰성 및 정확성, 디지탈 출력 그리고 멀티센서로의 응용성 등의 특성을 가진다. 칩제조를 위해 CMOS 공정을 응용한 새로운 공정을 설계하였고 칩을 layout 하였다.
A new ISFET array chip, based on detection of the threshold voltages of ISFETs by using an adjustable input, was designed. The chip includes 240 pH-ISFETs and circuitry such as comparators, a decoder and register. The chip has increased reliability, improved accuracy, digital output capability and the possibility of multi sensor implementation. To fabricate the chip, an extended CMOS process was devised and implemented.
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