전자공학회논문지B (Journal of the Korean Institute of Telematics and Electronics B)
- 제31B권4호
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- Pages.55-61
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- 1994
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- 1016-135X(pISSN)
전류방식 CMOS에 의한 ROM 형의 다치 논리 회로 설계
Design of Multiple Valued Logic Circuits with ROM Type using Current Mode CMOS
초록
The multiple valued logic(MVL) circuit with ROM type using current mode CMOS is presented in this paper. This circuit is composed of the multiple valued-to-binary(MV/B) decoder and the selection circuit. The MV/B decoder decodes the single input multiple valued signal to N binary signal, and the selection circuits is composed N
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