전자공학회논문지B (Journal of the Korean Institute of Telematics and Electronics B)
- 제30B권11호
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- Pages.66-73
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- 1993
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- 1016-135X(pISSN)
Hopfield 신령회로망의 VLSI 구현에 관한 연구
VLSI Implementation of Hopfield Neural Network
초록
This paper presents an analog circuit implementation and experimental resuls of the Hopfield type neural network. The proposed architecture enables the reconfiguration betwewn feedback and feedforward networks and employs new circuit designs for the weight supply and storage, analog multilier, nd current-voltage converter, in order to achieve area efficiency as well as function al versatility. The layout design of the eight-neuron neural network is tested as an associative memory to verify its applicability to real world.
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