전자공학회논문지A (Journal of the Korean Institute of Telematics and Electronics A)
- 제30A권2호
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- Pages.1-9
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- 1993
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- 1016-135X(pISSN)
SDH 시스템에서의 포인터 조정지터 감소 알고리듬 및 성능 연구
A Study on The Algorithm and Its Performance Evaluation for Reducing the Pointer Adjustment Jitter in a SDH-based system
초록
For frame synchronization in synchronous multiplexer based on SDH (Synchronous Digital Hierarchy), pointer justification mechanism (opinter adjustment) to compensate small frequency differences between the received uline clock and local clock is sed. But these pointer adjustment will introduce jitter onto tributary signal. This paper presents the bit leaking method to reduce those jitter to a level compatible with existing specification, where the simulation shows that this method reduces pointer adjustment jitter.
키워드