References
- Physics of Semiconductor Devices Sze, S.M.
- IEEE Trans. Electron Devices v.ED-21 no.Dec. Inadequacy of the classical theory of the MOS transistor operating in weak inversion Van Overstraeten, R.J.;Declerck, G.;Broux, G.L.
- MOS (Metal Oxide Semiconductor) Physics and Technology Nicollian, E.H.;Brews, J.R.
- Appl. Phys. Lett. v.7 MOS conductance technique for measuring surface state parameters Nicollian, E.H.;Goetzberger, A.
- Solid-State Electron. v.16 Measurement of low densities of surface states at the Si-SiO2-interface Declerck, G.;Van Overstraeten, R.J.;Broux, G.L.
- Jpn. J. Appl. Phys. v.18 Deep level transient spectroscopy of bulk traps and interface states in Si MOS diodes Yamasaki, K.;Yoshida, M.;Sugano, T.
- Solid-State Electron. v.23 Determination of interface-state parameters in a MOS capacitor by DLTS Tredwell, T.J.;Viswanathan, C.R.
- IEEE Trans. Electron Devices v.ED-16 Charge-pumping in MOS devices Brugler, J.S.;Jespers, G.A.
- IEEE Trans. Electron Devices v.ED-31 A reliable approach to charge-pumping measurements in MOS transistors Groeseneken, G.;Maes, H.E.;Beltran, N.;De Keersmecker, R.F.
- IEEE Trans. Electron Devices v.ED-22 Theory of the MOS transistor in weak inversion- new method to determine the number of surface states Van Overstraeten, R.J.;Declerck, G.T.;Muls, P.A.
- IEEE Trans. Nucl. Sci. v.NS-33 Correlation between CMOS transistor and capacitor measurements of interface trap spectra Russell, T.J.;Bennett, H.S.;Gaitan, M.;Schule, J.S.;Roitman, P.
-
Solid-State Electron.
v.35
An experimental comparison of measurement techniques to extract
$Si-SiO_2$ interface trap density Witczak, S.C.;Suehle, J.S.;Gaitan, M. - Solid-State Electron. v.22 The effects of two-dimensional charge sharing on the above-threshold characteristics of short-channel IGFETs Taylor, G.W.
- IEEE Trans. Electron Devices v.ED-28 Threshold voltage instability in MOSFET's due to channel hot-electron emission Fair, R.B.;Sun, R.C.
- IEEE Trans. Electron Devices v.ED-32 Dependence of the work-function difference between the polysilicon gate and silicon substrate on the doping level in polysilicon Lifshitz, N.
- Solid-State Electron. v.30 A unified analytical model for drain-induced barrier lowering and drain-induced high electric field in a short-channel MOSFET Jain, S.C.;Balk, P.
-
J. Kor. Vac. Soc.
v.2
Characterization of Gate Oxides with a Chlorine Incorporated
$SiO_2/Si$ Interface Yu, B.G.;Lyu, J.S.;Roh, T.M.;Nam, K.S. - Device Electronics for Integrated Circuits Miller, R.S.;Kamins, T.I.