Journal of the Korean Institute of Telematics and Electronics A (전자공학회논문지A)
- Volume 28A Issue 1
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- Pages.74-84
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- 1991
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- 1016-135X(pISSN)
Performance-driven Automatic Logic Synthesis System
성능 구동 논리 회로 자동 설계 시스템
Abstract
This paper presents an algorithm for technology-dependent logic optimization and technology mapping, and describes a performance-driven logic synthesis system, SILOS, implemented based on the proposed algorithm. The system analyzes circuits and resynthesizes the critical sections such that generated circuit operates opertes within time constraints, using only gate types supported by library for direct implementation. Experimental results show that the system can be a viable tool in synthesizing high-performance logic circuits.
Keywords