Proceedings of the Korean Institute of Information and Commucation Sciences Conference (한국정보통신학회:학술대회논문집)
- 2017.05a
- /
- Pages.697-699
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- 2017
Small size PLL with D Flip-Flop
D플립플롭을 사용한 작은 크기의 위상고정루프
- Ko, Gi-Yeong (Pukyong National University) ;
-
Choi, Hyuk-Hwan
(Pukyong National University)
;
- Choi, Young-Shig (Pukyong National University)
- Published : 2017.05.31
Abstract
A novel structure of phase locked loop (PLL) which has small size with D Flip-Flop and sub charge pump has been proposed. The area of loop filter usually occupying the larger portion of the chip is minimized using a single small capacitor. It has been simulated and proved by HSPICE in a CMOS
본 논문에서는 D 플립플롭과 보조 전하펌프를 사용하여 작은 크기의 위상고정루프를 제안하였다. 단일 커패시터를 사용하여 크기가 작기 때문에 위상고정루프의 집적화가 가능하다. 제안된 위상고정루프는 HSPICE로 시뮬레이션 하였으며, 1.8V