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SRAM의 읽기 및 쓰기 동작을 위한 Assist Block

Assist Block for Read and Write Operations of SRAM

  • ;
  • 손민한 (성균관대학교 정보통신대학) ;
  • 추현승 (성균관대학교 정보통신대학)
  • Tan, Tuy Nguyen (College of Information and Communication Engineering Sungkyunkwan University) ;
  • Shon, Minhan (College of Information and Communication Engineering Sungkyunkwan University) ;
  • Choo, Hyunseung (College of Information and Communication Engineering Sungkyunkwan University)
  • 발행 : 2013.05.10

초록

Static Random Access Memory (SRAM) using CMOS technology has many advantages. It does not need to refresh every certain time, as a result, the speed of SRAM is faster than Dynamic Random Access Memory (DRAM). This is the reason why SRAM is widely used in almost processors and system on chips (SoC) which require high processing speed. Two basic operations of SRAM are read and write. We consider two basic factors, including the accuracy of read and write operations and the speed of these operations. In our paper, we propose the read and write assist circuits for SRAM. By adding a power control circuit in SRAM, the write operation performed successfully with low error ratio. Moreover, the value in memory cells can be read correctly using the proposed pre-charge method.

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