Proceedings of the KIPE Conference (전력전자학회:학술대회논문집)
- 2011.07a
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- Pages.370-371
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- 2011
Minimization of DC-Link Capacitance for NPC Three-level PWM Converters
- Alemi, Payam (Dept. of Electrical Eng., Yeungnam University) ;
- Lee, Dong-Choon (Dept. of Electrical Eng., Yeungnam University)
- Published : 2011.07.05
Abstract
This paper presents a control algorithm that minimizes the DC-link capacitance by decreasing the capacitor current. The capacitor current can be nullified by a feedback compensation term which is calculated from the power balance in the AC/DC converter. As a result, voltage variation in the DC-link is reduced further, which makes a large reduction in the size of DC-link capacitors which are expensive and have limitations in life time. Simulations are performed with two 80uF DC-link capacitors, which can be replaced by film capacitors.
Keywords