한국방송∙미디어공학회:학술대회논문집 (Proceedings of the Korean Society of Broadcast Engineers Conference)
- 한국방송공학회 2011년도 추계학술대회
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- Pages.209-210
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- 2011
디지털 방송 시스템을 위한 효율적인 LDPC 복호기 설계
Efficient LDPC Decoder for Digital Vedio Broadcasting Systems
- Jang, Soohyun (School of ETCE, Korea Aerospace University) ;
-
Seo, Jeongwook
(KETI (Korea Electronics Technology Institute))
;
-
Kim, Hyunsik
(KETI (Korea Electronics Technology Institute))
;
-
Lee, Yeonsung
(KETI (Korea Electronics Technology Institute))
;
-
Jung, Yunho
(School of ETCE, Korea Aerospace University)
- 발행 : 2011.11.03
초록
In this paper, an area-efficient architecture of LDPC Decoder is proposed for DVB (Digital Video Broadcasting) 2.0 systems. The proposed LDPC Decoder was designed in hardware description language (HDL) and implemented with Xilinx Virtex-5 FPGA. With the proposed architecture, the number of slices for the decoder is 56122 and the number of block RAM is 135.
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