한국전기전자재료학회:학술대회논문집 (Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference)

한국전기전자재료학회 (The Korean Institute of Electrical and Electronic Material Engineers)
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엔지니어드된 터널 절연막과 전하트랩층에 고유전 물질을 적용한 전하 트랩형 메모리 캐패시터의 메모리 특성 개선

Improvement in Memory Characteristics of Charge Trap Memory Capacitor with High-k Materials as Engineered Tunnel Dielectrics and Charge Trap Layer

  • 발행 : 2009.06.18
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초록

The memory characteristics of charge trap memory capacitor with high-k materials were investigated. I-V characteristics of the fabricated device with band gap engineered tunneling gate stacks consisted of $SiO_2$, $ZrO_2$, $Al_2O_3$ dielectrics were evaluated and compared with the one consisted of $SiO_2$ tunneling dielectric. The memory capacitor including engineered tunneling dielectrics of ($Al_2O_3/ZrO_2/SiO_2$) shows the fastest PIE speed and long data retention time.

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