Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

A design of analog ZQ calibration with small CIO capacitance

CIO capacitance가 작은 analog ZQ calibration 의 설계

  • Park, Kyung-Soo (Division of Electronics and Computer Engineering Hanyang University) ;
  • Choi, Jae-Woong (Division of Electronics and Computer Engineering Hanyang University) ;
  • Chae, Myung-Joon (Division of Electronics and Computer Engineering Hanyang University) ;
  • Kim, Ji-Woong (Division of Electronics and Computer Engineering Hanyang University) ;
  • Kwack, Kae-Dal (Division of Electronics and Computer Engineering Hanyang University)
  • 박경수 (한양대학교 전자컴퓨터통신공학과) ;
  • 최재웅 (한양대학교 전자컴퓨터통신공학과) ;
  • 채명준 (한양대학교 전자컴퓨터통신공학과) ;
  • 김지웅 (한양대학교 전자컴퓨터통신공학과) ;
  • 곽계달 (한양대학교 전자컴퓨터통신공학과)
  • Published : 2008.06.18
Download PDF
⟨ Previous Next ⟩

Abstract

This paper proposes new analog ZQ calibration scheme. Proposed analog ZQ calibration scheme is for minimizing the reflection which degrade the signal integrity. And this scheme is for minimizing CIO capacitance. It is simulated under 1.5v supply voltage and samsung 0.18um process. Power consumption of proposed analog ZQ calibration circuit was improved by 32%. Under all skew, temperature from $30^{\circ}C$ to $90^{\circ}C$ and Monte carlo simulation, quantization error of RZQ(=$240{\Omega}$) is less han 1.07%.

Keywords