The arbiter for performance improvement of bus architecture

버스 아키텍처 성능 향상을 위한 중재 장치

  • Lee, Keun-Hwan (Dept. of Electronic Engineering Inha University) ;
  • Lee, Kook-Pyo (Dept. of Electronic Engineering Inha University) ;
  • Yoon, Yung-Sup (Dept. of Electronic Engineering Inha University) ;
  • Kang, Seong-Jun (Dept. of Electrical and Semiconductor Engineering, Chonnam National University)
  • 이근환 (인하대학교 전자공학과) ;
  • 이국표 (인하대학교 전자공학과) ;
  • 윤영섭 (인하대학교 전자공학과) ;
  • 강성준 (전남대학교 전기 및 반도체공학과)
  • Published : 2008.06.18

Abstract

This paper proposed a new arbitration method in arbiter which is one of bus system components for the design of SoC. Considering compatibility between IP and bus system, the performance of bus system can change the performance of SoC chip. The proposed arbitration method achieved the performance improvement with high efficiency depending on the environment in use.

Keywords