Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Desing of the $96.5{\mu}W$ Limiting Amplifier using low power technique

$96.5{\mu}W$ 소비 전력을 갖는 리미팅 증폭기 설계

  • Choi, Moon-Ho (School of Electrical and Computer Engineering Chungbuk National University) ;
  • Lee, Jong-Soo (School of Electrical and Computer Engineering Chungbuk National University) ;
  • Kang, Ji-Hee (School of Electrical and Computer Engineering Chungbuk National University) ;
  • Kim, Yeong-Seuk (School of Electrical and Computer Engineering Chungbuk National University)
  • 최문호 (충북대학교 전기전자컴퓨터공학부) ;
  • 이종수 (충북대학교 전기전자컴퓨터공학부) ;
  • 강지희 (충북대학교 전기전자컴퓨터공학부) ;
  • 김영석 (충북대학교 전기전자컴퓨터공학부)
  • Published : 2008.06.18
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Abstract

This paper presents fully integrated low power consumption limiting amplifier. The proposed limiting amplifier is employed folded cascode structure with source degeneration output stage. This proposed structure demands few transconductance than conventional structure. It can be dramatically decrease current consumption. The total power consumption is only $96.5\;{\mu}W$ under a 1.8 V supply voltage in 9.5 dB limited gain condition. It was designed in using $0.18\;{\mu}m$ CMOS technology.

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