Proceedings of the Korean Institute of Information and Commucation Sciences Conference (한국정보통신학회:학술대회논문집)

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
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A Design of Giga-bit security module Using Fully pipelined CTR-AES

Full-pipelined CTR-AES를 이용한 Giga-bit 보안모듈 설계

  • Vinh, T.Q. (Dept. of Electronics and Computer Engineering Chonnam National University) ;
  • Park, Ju-Hyun (Dept. of Electronics and Computer Engineering Chonnam National University) ;
  • Kim, Young-Chul (Dept. of Electronics and Computer Engineering Chonnam National University)
  • ;
  • 박주현 (전남대학교 전자컴퓨터공학부) ;
  • 김영철 (전남대학교 전자컴퓨터공학부)
  • Published : 2008.05.30
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Abstract

In this paper, we presented our implementation of a counter mode AES based on Virtex4 FPGA. Our design exploits three advanced features: composite field arithmetic SubByte, efficient MixColumn transformation, and On-the-Fly Key-Scheduling for fully pipelined architecture. By pipelining the composite field implementation of the S-box, the area cost is reduced to average 17 percent. By designing the On-the-Fly key scheduling, we implemented an efficient key-expander module which is specialized for a pipelined architecture.

Keywords