Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2007.07a
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- Pages.85-86
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- 2007
High-Speed Radix-8 Butterfly Structure
고속 Radix-8 나비연산기구조
- Hur, Eun-Sung (Department of Information and Telecommunication Engineering, SangMyung University) ;
- Park, Jin-Su (Department of Information and Telecommunication Engineering, SangMyung University) ;
- Han, Kyu-Hoon (Department of Information and Telecommunication Engineering, SangMyung University) ;
- Jang, Young-Beom (Department of Information and Telecommunication Engineering, SangMyung University)
- Published : 2007.07.11
Abstract
In this paper, a Radix-8 structure for high-speed FFT is proposed. Even throughput of the Radix-8 FFT is twice than that of the Radix-4 FFT, implementation area of the Radix-8 is larger than that of Radix-4 FFT. But, implementation area of the proposed Radix-8 FFT was reduced by using DA(Distributed Arithmetic) for multiplication. The Verilog-HDL coding results for the proposed FFT structure show 49.2% cell area increment comparison with those of the conventional Radix-4 FFT structure. Namely, to speed up twice, 49.2% of area cost is required. In case of same throughput, power consumption of the proposed structure is reduced by 25.4%.
Keywords