대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2006년도 하계종합학술대회
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- Pages.759-760
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- 2006
시프트 버퍼를 이용한 고속 가변길이 디코더 구현
An Implementation on the High Speed VLD using Shift Buffer
- Noh, Jin-Soo (Department of Electronics Engineering Chosun University) ;
- Baek, Hui-Chang (Department of Electronics Engineering Chosun University) ;
- Rhee, Kang-Hyeon (Department of Electronics Engineering Chosun University)
- 발행 : 2006.06.21
초록
In this paper, The author designed on high speed VLD(Variable Length Decoder) using shift buffer. Variable Length Decoder is received N bit data from input block and decode the input signal using Shifting Buffer, Length Decoder and Symbol Decoder blocks. The inner part of shifting buffer in proposed Variable Length Decoder is filled input data and then operating therefore, the proposed structure can improve the decoded speed. And in this paper we applying pipeline structure therefore data is decoded in every clock.
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