Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of 128 point pipelined FFT processor with 4-way structure

4-way 구조를 갖는 128 point 파이프라인 FFT 프로세서의 설계

  • Lee, Sang-Min (School of Electric and Electronic Engineering Yonsei University) ;
  • Cho, Un-Sun (School of Electric and Electronic Engineering Yonsei University) ;
  • Lee, Seong-Joo (School of Electric and Electronic Engineering Yonsei University) ;
  • Kim, Jae-Seok (School of Electric and Electronic Engineering Yonsei University)
  • 이상민 (연세대학교 전기전자공학과) ;
  • 조언선 (연세대학교 전기전자공학과) ;
  • 이성주 (연세대학교 전기전자공학과) ;
  • 김재석 (연세대학교 전기전자공학과)
  • Published : 2006.06.21
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Abstract

In this paper, 4-way data path 128 point pipelined FFT processor with 4-way structure is proposed. The proposed FFT processor has 4-way structure in order to meet data requirement of MB-OFDM system at 132MHz operating frequency. The FFT processor is based on R4MDC and extended to suit 4-way data path. The FFT processor is designed by Verilog HDL and the gate count is about 88k.

Keywords