대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

5GHz CMOS Quadrature Up-Conversion Mixer

  • Lee, Jang-U (Integrated Circuits Lab, ECE, Hanyang University) ;
  • Kim, Sin-Nyeong (Integrated Circuits Lab, ECE, Hanyang University) ;
  • Yu, Chang-Sik (Integrated Circuits Lab, ECE, Hanyang University)
  • 발행 : 2006.06.21
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초록

A CMOS quadrature Up-converter for a direct-conversion receiver of 5.15-5.825GHz wireless LAN is described. The Up-converter consists of two sub-harmonic mixers, for I and Q channels, and an LO generation network. In order to decrease the number of inductor, I and Q path are merged. The simulation results including all the parasitics show -17.3dB conversion gain at center and -8 dBv oIP3 while consuming 22.968mW under 1.8V supply. The quadrature Up-converter is under fabrication with the other transmitter blocks in a $0.18{\mu}m$ CMOS technology.

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