Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design and Implementation of a Power Aware Scalable Pipelined Booth Multiply & Accumulate Unit

소비전력 인지형 곱셈 연산 누적기의 설계 및 구현

  • Shin, Min-Hyuk (School of Information and Communication Engineering Inha University) ;
  • Lee, Han-Ho (School of Information and Communication Engineering Inha University)
  • 신민혁 (인하대학교 정보통신공학부) ;
  • 이한호 (인하대학교 정보통신공학부)
  • Published : 2006.06.21
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Abstract

A low-power power-aware scalable pipelined Booth recoded multiply & Accumulate unit (PA-MAC) detects the input operands for their dynamic range and accordingly implements a 16-bit, 8-bit or 4-bit multiplication and accumulation operation. The multiplication mode is determined by the dynamic - range detection unit. For the computations, although an area of the proposed PA-MAC is lager than a non-scalable MAC respectively, the proposed PA-MAC proves to be globally more power efficient than a non-scalable MAC.

Keywords