Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of three stage decimation filter using CSD code

CSD 코드를 사용한 3단 Decimation Filter 설계

  • Byun, San-Ho (School of Electrical and Computer Engineering Hanyang University) ;
  • Ryu, Seong-Young (School of Electrical and Computer Engineering Hanyang University) ;
  • Choi, Young-Kil (School of Electrical and Computer Engineering Hanyang University) ;
  • Roh, Hyung-Dong (School of Electrical and Computer Engineering Hanyang University) ;
  • Lee, Hyun-Tae (School of Electrical and Computer Engineering Hanyang University) ;
  • Kang, Kyoung-Sik (School of Electrical and Computer Engineering Hanyang University) ;
  • Roh, Jeong-Jin (School of Electrical and Computer Engineering Hanyang University)
  • 변산호 (한양대학교 전자컴퓨터공학부) ;
  • 류성영 (한양대학교 전자컴퓨터공학부) ;
  • 최영길 (한양대학교 전자컴퓨터공학부) ;
  • 노형동 (한양대학교 전자컴퓨터공학부) ;
  • 이현태 (한양대학교 전자컴퓨터공학부) ;
  • 강경식 (한양대학교 전자컴퓨터공학부) ;
  • 노정진 (한양대학교 전자컴퓨터공학부)
  • Published : 2006.06.21
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Abstract

Three stage(CIC-FIR-FIR) decimation filter in delta-sigma A/D converter for audio is designed. A canonical signed digit(CSD) code method is used to minimize area of multipliers. This filter is designed in 0.25um CMOS process and incorporates $1.36\;mm^2$ of active area. Measured results show that this decimation filter is suitable for digital audio A/D converters.

Keywords