Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 2006.10c
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- Pages.476-478
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- 2006
Design of a 2.5GHz $0.25{\mu}m$ CMOS Dual-Modulus Prescaler
2.5GHz $0.25{\mu}m$ CMOS Dual-Modulus 프리스케일러 설계
- Oh, K.C. ;
- Kang, K.S. ;
- Park, J.T. ;
- Yu, C.G.
- Published : 2006.10.27
Abstract
A prescaler is an essential building block for PLL-based frequency synthesizers and must satisfy high-speed and low-power characteristics. The design of D-flip flips used in the prescaler implementation is thus critical. In this paper a 64/65, 128/129 dual-modulus prescaler is designed using a