The Transmission of Random Clock Data using FPGA

FPGA를 이용하여 다양한 클럭 데이터 전송

We made the logic that can transmit the service data and clock of interest by using the optical signal and demodulate the original signal at the receiving end. Because We can interface the all communications equipment to which We intended to send the signal. We can modulate the dock and clocked data using optical signal and then transmit the original optical signal to the receiving end, finally, arbitrarily control the traffic between ports.