Proceedings of the Korea Information Processing Society Conference (한국정보처리학회:학술대회논문집)
- 2004.05a
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- Pages.1655-1658
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- 2004
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- 2005-0011(pISSN)
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- 2671-7298(eISSN)
David II: A new architecture for parallel rendering processors with effective memory system
David II: 효과적인 메모리 시스템을 가지는 병렬 렌더링 프로세서
- Lee, Kil-Whan (Dept. of Computer Science, Yonsei University) ;
- Park, Woo-Chan (Dept. of Computer Engineering, Sejong University) ;
- Kim, Il-San (Dept. of Computer Science, Yonsei University) ;
- Han, Tack-Don (Dept. of Computer Science, Yonsei University)
- Published : 2004.05.14
Abstract
Current rendering processors are organized mainly to process a triangle as fast as possible and recently parallel 3D rendering processors, which can process multiple triangles in parallel with multiple rasterizers, begin to appear. For high performance in processing triangles, it is desirable for each rasterizer have its own local pixel cache. However, the consistency problem may occur in accessing the data at the same address simultaneously by more than one rasterizer. In this paper, we propose a parallel rendering processor architecture, called DAVID II, resolving such consistency problem effectively. Moreover, the proposed architecture reduces the latency due to a pixel cache miss significantly. The experimental results show that DAVID II achieves almost linear speedup at best case even in sixteen rasterizers.
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