대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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- Pages.61-65
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- 2004
Advanced JTAG-based On-Chip Debugging Unit Design for SoC
- Yun Yeonsang (Dept of Electrical and Computer Engineering, Chungbuk Nat'1 University) ;
- Kim Seungyoul (Dept of Electrical and Computer Engineering, Chungbuk Nat'1 University) ;
- Kim Youngdae (Dept of Electrical and Computer Engineering, Chungbuk Nat'l1University) ;
- You Younggap (Dept of Electrical and Computer Engineering, Chungbuk Nat'1 University)
- 발행 : 2004.08.01
초록
An on-chip debugging unit is proposed aiming performance enhancement of JTAG-based SoC systems. The proposed unit comprises a JTAG module and a core breaker. The IEEE 1149.1 standard has been modified and applied to the new JTAG module. The proposed unit eliminates redundant clock cycles included in the TAP command execution stage reducing overall debugging time. TAP execution commands are repeatedly issued to perform debugging of complicated SoC systems. Simulation on the proposed unit shows some