An Implementation of Highly Integrated Signal Processing IC for HDTV

  • Hahm Cheul-Hee (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.) ;
  • Park Kon-Kyu (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.) ;
  • Kim Hyoung-Gil (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.) ;
  • Jung Choon-Sik (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.) ;
  • Lee Sang-keun (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.) ;
  • Jang Jae-Young (D-TV P/J Team, SoC R&D Center, Samsung Electronics Co., Ltd.) ;
  • Park Sung-Uk (D-TV P/J Team, SoC R&D Center, Samsung Electronics Co., Ltd.) ;
  • Chon Byung-Hoan (D-TV P/J Team, SoC R&D Center, Samsung Electronics Co., Ltd.) ;
  • Chun Kang-Wook (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.) ;
  • Jo Jae-Moon (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.) ;
  • Song Dong-il (Home Solution Lab., Digital Media R&D Center, Samsung Electronics Co., Ltd.)
  • Published : 2003.11.01

Abstract

This paper presents a signal processing IC for digital HDTV, which is designed to operate in bunt-in HDW or in HD-set-top Box. The chip supports de-multiplexing an ISO/IEC 13818-1 MPEG-2 TS stream. It decodes MPEG-2 MP@HL video bitstream, and provides high-quality scaled video for display on HDTV monitor. The chip consists of ARM7TDMI for TS-Demux, PCI interface, Audio interface, MPEG2 MP@HL video decoder Display processor, Graphic processor, Memory controller, Audio int3face, Smart Card interface and UART. It is fabricated using Sam sung's 0.18-um and the package of 492-pin BGA is used.

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