Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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MOTION ESTIMATION ALGORITHM AND HARDWARE ARCHITECTURE FOR H.264/AVC

H.264/AVC 용 움직임 추정 알고리즘 및 하드웨어 구조

  • 이재헌 (삼성전자 주식회사 디지털미디어 연구소) ;
  • 이남숙 (삼성전자 주식회사 디지털미디어 연구소)
  • Published : 2003.11.01
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Abstract

This paper presents a variable block size motion estimation (ME) algorithm and hardware architectures dedicated to H.264/AVC. Proposed ME architecture can achieve real-time processing for 720$\times$480@30Hz with search range of [-64, +63] in the horizontal and [-32, +31] in the vertical direction at integer-pel accuracy and upto 7 reference frames at the operating frequency of 54MHz.

Keywords