대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2002년도 ITC-CSCC -2
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- Pages.1308-1311
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- 2002
An Efficient MPEG-4 Video Codec using Low-power Architectural Engines
- Bontae Koo (Advanced Micro-Electronics Research Lab., ETRI) ;
- Park, Juhyun (Advanced Micro-Electronics Research Lab., ETRI) ;
- Park, Seongmo (Advanced Micro-Electronics Research Lab., ETRI) ;
- Kim, Seongmin (Advanced Micro-Electronics Research Lab., ETRI) ;
- Nakwoong Eum (Advanced Micro-Electronics Research Lab., ETRI)
- 발행 : 2002.07.01
초록
We present a low-power MPEG-4 video codec chip capable of delivering high-quality video data in wireless multimedia applications. The discussion will focus on the architectural design techniques for implementing a high-performance video compression/decompression chip at low power architectures. The proposed MPEG-4 video codec can perform 30 frames/s of QCIF or 7.5 frame/s of CIF at 27MHz for 128k∼144kbps. By introducing the efficiently optimized Frame Memory Interface architecture, low power motion estimation and embedded ARM microprocessor and AMBA interface, the proposed MPEG-4 video codec has low power consumption for wireless multimedia applications such as IMT-2000.
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