대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2002년도 ITC-CSCC -2
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- Pages.1288-1291
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- 2002
A MPEG-4 Video Codec Chip with Low Power Scheme for Mobile Application
- Park, Seongmo (Basic Research Laboratory, ETRI) ;
- Lee, Miyoung (Basic Research Laboratory, ETRI) ;
- Kwangki Ryoo (Basic Research Laboratory, ETRI) ;
- Hanjin Cho (Basic Research Laboratory, ETRI) ;
- Kim, Jongdae (Basic Research Laboratory, ETRI)
- 발행 : 2002.07.01
초록
In this paper, we present a design of mpeg-4 video codec chip to reduce the power consumption using frame level clock gating and motion estimation skip scheme. It performs 30 grames/s of codec (encoding and decoding) mode with quarter-common intermediate format(QCIF) at 27MHz. A novel low-power techniques were implemented in architectural level, which is 35% of the power dissipation for a conventional CMOS design. This chip performs MPEG-4 Simple Profile Level 2(Simple@L2) and H.263 base mode. Its contains 388,885 gates, 662k bits memory, and the chip size was 9.7 mm x 9.7 mm which was fabricated using 0.35 micron 3-layers metal CMOS technology.
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