대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
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- Pages.352-355
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- 2001
반도체 소자의 직류특성 측정 시스템에서의 저전류 측정 오차 감소 기법
Measurement error reduction technique for the Semiconductor Device DC Characteristic Measurement System
- Choi, In-Kyu (Dept. of Electronic Engineering, Kyunpook National University) ;
- Jung, Hae-Yone (Dept. of Electronic Engineering, Kyunpook National University) ;
- Park, Jong-Sik (Dept. of Electronic Engineering, Kyunpook National University)
- 발행 : 2001.11.24
초록
In this paper, we proposed measurement error reduction technique for the semiconductor device DC characteristic measurement system. Implemented system is composed of 4 SMUs, 2 VSUs, and 2 VMUs. Various efforts in hardware and software have been made to reduce the measurement errors due to the leakage current in measurement circuits. Internal and external sources of errors in measurement system especially in pA range measurement have been identified and removed. Experimental results show that the implemented system can be measure the DC characteristic of semiconductor devices in pA level.
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